Programme général

Programme général de ComPAS 2013
(cliquer ici pour télécharger le pdf)
pg_compas


Conférencier invité – Parallélisme : Mitsuhisa Sato, University of Tsukuba, Japan

sato

Titre de l’exposé : The K computer and XcalableMP parallel language project
— Towards programming environment for productive high-performance scientific programming —

Résumé de l’exposé:

The K computer is Japanese petascale computing facility, which were installed in RIKEN Advanced Institute for Computational Science (AICS) and under operation now. The K computer has been ranked as the top 1 in the top 500 list in 2011. The goals of the project are not only to develop and install the most advanced high performance supercomputer system with 10-peta flops class performance, but also development and deployment of scientific pata-scale application software, which should be made to attain the system maximum capability, in various science and engineering fields. The programming environment including programming languages is an important research topic to improve performance and increase productivity of computational sciences using the high performance computer systems.

For the K computer, a PGAS parallel programming language called XcalableMP (XMP for short) is deployed by the AICS. XcalableMP is a directive-based language extension of Fortran95 and C for scientific programming for high-performance distributed memory parallel systems. The design of the specification of XcalableMP is a community effort by XcalableMP Specification Working Group which consists of members from academia, research labs and industries in Japan. XcalableMP Application Program Interface (XcalableMP API) is a collection of compiler directives and runtime library routines that can be used to specify distributed-memory parallel programming in C and Fortran95 programs. This specification provides a model of parallel programming for distributed memory multiprocessor systems, and the directives extend the C and Fortran95 base languages to describe distributed-memory parallel programs, as in OpenMP. Extension of existing base languages with directives is useful to reduce rewriting and educational costs.

XcalableMP supports typical parallelization based on the data parallel paradigm and work mapping under « global view », and enables parallelization of the original sequential code using minimal modification with simple directives, as in OpenMP.. This paradigm features functions for array distribution and work mapping for loops on parallel processes, which are normally executed as MPI processes. XcalableMP also includes a CAF-like Partitioned Global Address Space (PGAS) feature for « local view » programming. The important design principle of XcalableMP is « performance-awareness ». All actions of communication and synchronization are performed by directives, which are different from automatic parallelizing compilers. The user should be aware of what happens by XcalableMP directives in the execution model on the distributed memory architecture. This is very important for easy of understanding in performance tuning. A reference implementation of XcalableMP compiler is provided by our group of University of Tsukuba and RIKEN Advanced Institute for Computational Science.

Biographie de l’orateur :

Mitsuhisa Sato received the M.S. degree and the Ph.D. degree in information science from the University of Tokyo in 1984 and 1990. He was a senior researcher at Electrotechnical Laboratory from 1991 to 1996, and a chief of Parallel and distributed system performance laboratory in Real World Computing Partnership, Japan, from 1996 to 2001. Currently, he is a professor of Graduate School of Systems and Information Engineering, University of Tsukuba. He is a director of Center for computational sciences, University of Tsukuba since 2007. Since October 2010, he is appointed to the research team leader of programming environment research team in Advanced Institute of Computational Science (AICS), RIKEN, which is the main organization to run Japanese petaflops facility « K computer » in Japan.



Conférencier invité – Système : Gordon Blair, University of Lancaster, UKblair

Titre de l’exposé : Perspectives on Cloud Computing

Résumé de l’exposé:

Cloud computing is arguably the most significant innovation in distributed systems since the inception of the subject in the 1980s. The impact of cloud computing in its short history is quiet astonishing and is changing the face to areas such as eCommerce and eGovernment. The speaker has significant experience in applying cloud computing concepts in support of Environmental Science, enabling a new kind of ‘big’ science that supports open access to data and models and also integration of such scientific assets from a variety of scales and perspectives. This is essential to support the kind of paradigm shift required in Environmental Science to understand and manage climate change, for example. Cloud computing is however not without its problems and in many ways is in its infancy in terms of the support that can be offered to its many end user communities. In this talk, the speaker will reflect on his experiences in working with Environmental Scientists, highlighting the many positive features offered by cloud computing but also the key challenges, both in technical terms and in other areas, that must be overcome before cloud computing can claim to be a mature technology.

Biographie de l’orateur :

Gordon Blair is a Professor of Distributed Systems in the School of Computing and Communications at Lancaster University and is also an Adjunct Professor at the University of Tromsø in Norway. He has published over 280 papers in his field and is on the PCs of many major international conferences in middleware and distributed systems. He is also chair of the steering committee of the ACM/ IFIP/ Usenix Middleware series of conferences. His current research interests include distributed systems architecture, middleware (including reflective and adaptive middleware),  model-driven engineering techniques applied to adaptive distributed systems, and the applicability of contemporary distributed systems technologies (including cloud computing) to environmental science. He is co-author of the highly successful book Distributed Systems: Concepts and Design by Coulouris, Dollimore, Kindberg and Blair with the 5th edition published in 2011. He is also Director of the HighWire Centre for Doctoral Training, a PhD programe taking a cross-disciplinary perspective on innovation as it relates to the digital economy, and is co-editor in chief of Springer’s Journal of Internet Services and Applications.



Conférencier invité – Architecture : Benoît Dupont de Dinechin, Kalray, Grenoble, Francedinechin

Titre de l’exposé : L’interface des réseaux sur puce: une nouvelle frontière architecturale

Résumé de l’exposé:

L’architecture des ordinateurs constitue un domaine bien établi en ce qui concerne les cœurs de calcul et les contrôleurs d’entrées-sorties. Au niveau de l’architecture globale des super ordinateurs massivement parallèles à mémoire distribuée, les interfaces de réseau Infiniband ou Ethernet offrent un support classique sur lequel les librairies de communication et langages de programmation parallèle peuvent s’appuyer.

L’expérience de Kalray sur la conception et la réalisation de processeurs massivement parallèles à mémoire distribuée et intégrés sur puce, en particulier le processeur MPPA-256 réalisé en technologie CMOS 28nm qui intègre 288 cœurs répartis entre 20 espaces d’adressage, révèle qu’il n’existe pas de solution architecturale éprouvée qu’il suffirait de reprendre au niveau des interfaces de communication et de synchronisation explicite par réseau sur puce.

Cet exposé présente la problématique de la conception des interfaces de réseau sur puce, motivé par le support de différents modèles de programmation des applications cibles du processeur MPPA-256. Contrairement au calcul parallèle hautes performances, ces applications sont exigeantes sur la prédictibilité des temps d’exécution. Les solutions retenues sur le MPPA-256 incluent la provision de deux NoC spécialisés, le transport de données avec ou sans notification à la réception, et l’exploitation de modes ‘multicast’.


Biographie de l’orateur :

Benoît Dupont de Dinechin dirige actuellement le développement logiciel de Kalray (http://www.kalray.eu), une entreprise qui conçoit et produit des processeurs massivement parallèles intégrés destinés aux applications embarquées industrielles et professionnelles. Benoît est également le principal architecte du cœur VLIW de Kalray, ainsi que le co-architecte du processeur MPPA (Multi Purpose Processing Array) à 288 cœurs.
Avant de rejoindre Kalray, Benoît était en charge de la R\&D de la division Software, Tools, Services de STMicroelectronics, avec une activité dirigée en particulier sur la conception de compilateurs, de machine virtuelles, et de systèmes à composants logiciels, pour les systèmes embarqués. Benoît à été promu STMicroelectronics National Fellow en 2008.
Avant de rejoindre STMicroelectronics, Benoit était employé au Département de Mathématiques Appliquées du CEA-DAM. A cette occasion, il a travaillé à temps partiel au Cray Research Park (Minnesota, USA), où il a entièrement conçu et réalisé le pipelineur logiciel des compilateurs de production des Cray T3E.
Benoît est diplômé de L’École Nationale Supérieure de l’Aéronautique et de l’Espace (Toulouse, France). Il a obtenu son doctorat en systèmes informatiques à l’Université Pierre et Marie Curie (Paris) sous la direction du professeur P. Feautrier, et a poursuivi des études post-doctorales à l’Université McGill (Montreal, Canada) dans le laboratoire ACAPS du professeur G. R. Gao.